The invention relates to methods and apparatus for controlling the delivery of power to a load, and more particularly relates to power control techniques that improve reliability and reduce power consumption.
Information technology (IT) equipment rooms (also known as data centers) utilize hundreds or even thousands of units of IT equipment. Each piece of IT equipment receives primary power by plugging into an outlet of a power distribution unit (“PDU”). A PDU is also a piece of IT equipment and typically includes: (a) a high power inlet from which power is received (typically from a panel board); (b) multiple lower power outlets; and (c) (optional) circuit breakers or fuses to protect the outlets from over current conditions (short circuits, etc.). PDUs are often designed to report certain status information over a communication and/or input/output interface, including: (a) the voltage being supplied to a given PDU's inlet, (b) how much power is flowing in the inlet and each outlet, and (c) the trip state (whether voltage is present) of each circuit breaker.
Additionally, each PDU may include the capability of turning the output voltage on and off in response to microcontroller signaling. This capability permits some level of software control over the power being delivered from each output of the PDU to much, if not most, of the of the IT equipment. FIGS. 1A-1B illustrate a block diagram and a timing diagram, respectively, of a conventional system 10 for controlling a single output of a PDU via a microcontroller 12. The system 10 includes the microcontroller 12, an electromechanical relay 14, and a driver transistor 16. As is known in the art, the microcontroller 12 is capable of producing a signal on a general-purpose-input-output (GPIO) pin that controls the state of the power (120V AC) delivered to the output of the PDU, labeled AC LOAD. For brevity and clarity, this description will not go into extensive detail as to the hardware, firmware, and/or software functionality of the microcontroller 12. Suffice it to say that there are numerous conditions under which it is desirable for the microcontroller 12 to turn on, turn off, and float the signal on the GPIO pin. It is noted that while there may be tens, hundreds, or thousands of GPIO pins in the system 10, the description here is concerned with one such pin, which description may be extended to other GPIO pins in the system 10.
As illustrated in the top plot of FIG. 1B, the GPIO pin exhibits a tristate output, where the state of the GPIO pin may be OFF (e.g., 0 volts), ON (e.g., 1 volt), or FLOAT (e.g., a high impedance input). When the GPIO pin is OFF, the potential is at a logic low (e.g., 0 volts) and the pin is capable of sinking current (into a relatively low impedance). When the GPIO pin is ON, the potential is at a logic high (e.g., 1 volt) and the pin is capable of sourcing current (from a relatively low impedance). When the GPIO pin is at the FLOAT state, the pin operates as a relatively high impedance input, and assumes a potential dictated by the circuitry external to the microcontroller 12.
With reference to FIG. 1A and the middle and bottom plots of FIG. 1B, the electromechanical relay 14 includes a coil and at least one set of contacts. It is assumed that the relay 14 is “normally open,” which means that when the coil is not energized (no current is flowing through the coil), the contacts assume an OFF (open) state and the path between the set of contacts is open. In the OFF state, there is no current path from the 120V AC node to the AC load. When the coil is energized, where current is flowing through the coil, a magnetic field produced by the coil causes the contacts to assume an ON state and the path between the set of contacts is closed. In the ON state, there is a current path from the 120V AC node to the AC load, and the load is energized.
The driver transistor 16 controls the current through the coil of the relay 14 in response to the potential on the GPIO pin. In the illustrated example, the driver transistor 16 is an n-channel MOSFET. As such, when the when the GPIO pin is ON (placing about 1 volt on the gate), the driver transistor 16 turns on, provides a current path (from drain to source), and draws current through the coil. It is assumed that the impedance through the coil and the driver transistor 16 is such that the current through the coil is about 33 mA when the GPIO pin is ON. As discussed above, the current through the coil pulls in the contacts and the path from the 120V AC node to the AC load is established. When the GPIO pin is OFF, the pin is a current sink and charge is drawn from the gate, resulting in about 0 volts of bias from gate to source on the driver transistor 16. Thus, the driver transistor 16 turns off, the current path from drain to source is interrupted, and no current flows through the coil. As discussed above, the lack of current through the coil permits the normally open contacts to separate, and the path from the 120V AC node to the AC load is terminated.
As noted above, the GPIO pin may also assume a FLOAT state, whereby the pin operates as a relatively high impedance input. In such state, the GPIO pin will assume some voltage dictated by the circuitry external to the microcontroller 12. Such voltage is illustrated as being somewhere between ON and OFF in FIG. 1B. Although not shown in FIG. 1A, the driver transistor 16 will include some shunt resistance between gate and source. Thus, when the GPIO pin is in the FLOAT state, although the pin assumes a high impedance input characteristic, the shunt resistance of the driver transistor 16 will discharge the gate, resulting in about 0 volts of bias on the driver transistor 16. Thus, the driver transistor 16 turns off, the current path from drain to source is interrupted, no current flows through the coil, the contacts separate, and the path from the 120V AC node to the AC load is terminated.
It is not desirable for the relay 14 to change state when the GPIO pin transitions from ON or OFF to the FLOAT state. The conventional system 10 does not present a problem when the GPIO pin transitions from OFF to the FLOAT state if one assumes that the potential on the gate of the transistor 16 is insufficient to pull current through the coil. Indeed, the relay 14 remains OFF (contacts open) through such a transition. Unfortunately, the conventional system 10 presents a significant problem when the GPIO pin transitions from ON to the FLOAT state, because the relay 14 transitions from ON (contacts closed) to OFF (contacts open) through the transition.
Although the FLOAT state of the GPIO pin may be intentionally set and/or avoided by way of software control, such state may also be inadvertently attained in any number of ways. For example, via electromagnetic interference (EMI), or some type of reset condition in the microcontroller 12 (such as a power cycle, a new firmware or software reset, and/or a user manual reset). Unfortunately, the system 10 of the prior art PDU disadvantageously turns off the relay 14 and interrupts the 120V AC power to the load when the microcontroller 12 resets and the GPIO pin transitions from ON to the FLOAT state. Such interruption of the power to the load may lead to very significant, and unwanted, actions by the IT equipment drawing power from the PDU. This problem is exacerbated by the large numbers of separate IT equipment drawing power from respective relays of the PDU, and the potentially large number of respective PDUs sourcing power to still further IT equipment.
The conventional system 10 also presents another significant problem in the context of power dissipation in the PDU. Consider that an IT equipment room with thousands of units of IT equipment will require thousands of relays 14 and associated driver transistors 16. The average power dissipation in the circuit for a single load is: I×V=33 mA×12=396 mW. Multiplying this power dissipation product by thousands of independent loads, one can see how inefficient the prior art system 10 really is.
This power inefficiency problem of the system 10 has been addressed in the prior art by modifying the current, to the coil of the relay 14 after the contacts have initially closed. This technique recognizes the physical electromechanical characteristics of the coil and contacts of the relay 14. In particular, a higher level of current in the coil (and thus a higher magnetic field and force) is required to overcome the inertia of the normally open contacts (which are often held open with some sort of spring) and force the contacts to close. This level is called the “turn on current” for the coil and is specified by the relay manufacturer. Once closed, the contacts require a lower level of magnetic force to remain closed, which is intuitive because, once closed, the inertia has been overcome. This level is called the “hold current” for the coil and is also specified by the relay manufacturer. Some prior art relay driver circuits employ a first current to turn. ON the relay, and a second, lower, current to hold the relay closed. This technique can improve the efficiency of the PDU considerably.
Although the prior art systems address some inherent disadvantages of the conventional PDU systems, the known solutions are unsatisfactory in the context of both the aforementioned undesirable power interruptions to the load upon a microcontroller resent and the power dissipation inefficiencies. There are, therefore, needs in the art for new methods and apparatus for controlling the power delivery to the load, which address the rest issue, the efficiency issue, and a related issue of system reliability.